Low-field time dependent dielectric breakdown characterization of very large area gate oxide [CMOS]

Author

Bahrami, Mahmoud ; Fishbein, Bruce ; Lindo, Patrick

Author_Institution

Digital Equipment Corp., Hudson, MA, USA

fYear

1997

fDate

21-25 Jul 1997

Firstpage

162

Lastpage

166

Abstract

Time Dependent Dielectric Breakdown analysis is performed on large area gate oxide to characterize the extrinsic portion of distribution. We use failure distribution comparison to identify the proper failure criteria, and calculate acceleration parameters. A thermal activation energy of 0.32 eV was obtained for the extrinsic population. Failure analysis was performed an samples from early fail and extrinsic populations and found different mechanisms responsible for the failures. Two scaling models were evaluated for their effectiveness for correlating fast and slow oxide tests, and predicting fallout under burn-in and operating conditions

Keywords

CMOS integrated circuits; electric breakdown; failure analysis; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; 0.32 eV; acceleration parameters; burn-in; extrinsic population; failure criteria; failure distribution comparison; fallout; low-field time dependent dielectric breakdown; operating conditions; scaling models; thermal activation energy; very large area gate oxide; Acceleration; Capacitors; Circuit testing; Dielectric breakdown; Failure analysis; Leakage current; Performance analysis; Predictive models; Semiconductor device modeling; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical & Failure Analysis of Integrated Circuits, 1997., Proceedings of the 1997 6th International Symposium on

Print_ISBN

0-7803-3985-1

Type

conf

DOI

10.1109/IPFA.1997.638188

Filename

638188