A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming

Author

Hsiao, Sen-Wen ; Huang, Yen-Chih ; Liang, David ; Chen, Hsin-Shu ; Hsin-Shu Chen

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei

fYear

2006

fDate

21-24 May 2006

Lastpage

568

Abstract

A 2nd-order curvature-compensated CMOS bandgap reference circuit with a novel trimming technique is described. The 2nd-order curvature compensation is implemented by using a temperature-dependent resistor ratio generated by a poly resistor and a diffusion resistor. A trimming technique with digital switches is utilized to increase or decrease resistance bi-directionally and therefore to minimize the variance of resistance. The proposed voltage reference operates down to a 1.5 V supply and consumes a maximum supply current of 55 muA. The experimental prototype circuit in a standard 0.35-mum CMOS process achieves a temperature coefficient of 10 ppm/degC and occupies an area of 0.71 mm²

Keywords

CMOS integrated circuits; energy gap; reference circuits; resistors; switches; 0.35 micron; 1.5 V; 2nd order curvature compensation; 55 muA; CMOS bandgap reference circuit; diffusion resistor; digital switches; maximum supply current; poly resistor; prototype circuit; temperature dependent resistor ratio; trimming technique; voltage reference; Bidirectional control; CMOS process; Circuits; Current supplies; Photonic band gap; Prototypes; Resistors; Switches; Temperature; Voltage; CMOS bandgap reference; curvature compensation; low voltage; trimming;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1692648

Filename

1692648