DocumentCode :
2532946
Title :
Active reversed nested Miller compensation for three-stage amplifiers
Author :
Grasso, A.D. ; Palumbo, G. ; Pennisi, S.
Author_Institution :
Dipt. di Ingegneria Elettrica Elettronica, Catania Univ.
fYear :
2006
fDate :
21-24 May 2006
Abstract :
A novel frequency compensation technique for three-stage amplifiers is introduced. Compared to the traditional reversed nested Miller compensation strategy, the proposed one exploits two active stages already included in the amplifier topology, thus no extra circuitry for its implementation is needed. The technique allows to remove the right-half-plane zero and generates a left-half-plane zero, improving the phase margin. Design equations using the phase margin as design parameter are carried out. The proposed technique is used to design, using a standard CMOS 0.35-mum technology, a 2-V three-stage amplifier driving a 500-pF load. The amplifier dissipates 0.24 mW at DC and achieves a 1.75-MHz gain-bandwidth product
Keywords :
CMOS analogue integrated circuits; integrated circuit design; operational amplifiers; 0.24 mW; 0.35 micron; 1.75 MHz; 2 V; 500 pF; CMOS technology; active reversed nested Miller compensation; frequency compensation; left-half-plane zero; phase margin; right-half-plane zero; three-stage amplifiers; CMOS technology; Capacitors; Circuit topology; Energy consumption; Equations; Frequency; Network topology; Operational amplifiers; Transconductance; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1692734
Filename :
1692734
Link To Document :
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