An open-source based DSP with enhanced multimedia-processing capacity for embedded applications

Author

Mai, Songping ; Yang, Kun ; Lan, Wenli ; Zhang, Chun ; Wang, ZhiHua

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing

fYear

2006

fDate

21-24 May 2006

Lastpage

942

Abstract

This paper proposes an open-source based 32-bit digital signal processor (DSP) suitable for embedded multimedia processing applications. The DSP is a MIPS-based scalar RISC with Harvard micro architecture, 5-stage integer pipeline and enhanced multimedia-processing capacity. It features a data path including non-aligned data access mechanism, two-dimensional DMA function and separated embedded instruction and data memories. This special architecture greatly promotes execution efficiency of boundary-crossed and block data access operations often found in multimedia processing. The processor achieves 80-MIPS performance with typical power dissipation of 88 mW. The prototype has been fabricated using UMC 0.18mum n-well 1P6M standard CMOS technology

Keywords

CMOS digital integrated circuits; digital signal processing chips; multimedia systems; reduced instruction set computing; 0.18 micron; 2D DMA function; 88 mW; CMOS technology; Harvard micro architecture; MIPS; data access operations; data memories; data path; digital signal processor; embedded instruction; embedded multimedia processing; integer pipeline; non-aligned data access mechanism; scalar RISC; Application software; CMOS technology; Digital signal processing; Digital signal processors; Hardware; Microarchitecture; Mobile communication; Open source software; Pipelines; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1692741

Filename

1692741