• DocumentCode
    2533110
  • Title

    Analysis of BJT circuits having multiple DC solutions using deflation technique

  • Author

    Tadeusiewicz, Michal ; Halgas, Stanilaw

  • Author_Institution
    Dept. of Electr., Electron., Comput. & Control Eng., Tech. Univ. of Lodz, Lódz, Poland
  • fYear
    2012
  • fDate
    18-21 Sept. 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The paper is focused on the analysis of diode-transistor circuits having multiple DC solutions. The transistors are characterized by the Ebers-Moll model consisting of two pairs of diode - controlled source combinations and contact resistors. An idea of deformation of the equation describing the circuit, in such a way that it avoids the solutions earlier determined and retains the remaining solutions, called a deflation, is applied. This idea is combined with the discrete circuit equivalent of the Newton-Raphson modified nodal analysis. An efficient deflation technique is developed, enabling us to find multiple DC solutions of rather large-sized circuits. To illustrate the proposed approach a numerical example is given.
  • Keywords
    Newton-Raphson method; bipolar transistors; diode-transistor logic; resistors; BJT circuit analysis; Ebers-Moll model; Newton-Raphson modified nodal analysis discrete circuit equivalent; contact resistor; deflation; deflation technique; diode-controlled source combination; diode-transistor circuit; equation deformation; large-sized circuit; multiple DC solution; Algorithm design and analysis; Computational modeling; Equations; Integrated circuit modeling; Mathematical model; Resistors; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals and Electronic Systems (ICSES), 2012 International Conference on
  • Conference_Location
    Wroclaw
  • Print_ISBN
    978-1-4673-1710-8
  • Electronic_ISBN
    978-1-4673-1709-2
  • Type

    conf

  • DOI
    10.1109/ICSES.2012.6382253
  • Filename
    6382253