• DocumentCode
    2533137
  • Title

    A modified approach to data cache management

  • Author

    Tyson, Gary ; Farrens, Matthew ; Matthews, John ; Pleszkun, Andrew R.

  • Author_Institution
    Dept. of Comput. Sci., California Univ., Riverside, CA, USA
  • fYear
    1995
  • fDate
    29 Nov-1 Dec 1995
  • Firstpage
    93
  • Lastpage
    103
  • Abstract
    As processor performance continues to improve, more emphasis must be placed on the performance of the memory system. In this paper, a detailed characterization of data cache behavior for individual load instructions is given. We show that by selectively applying cache line allocation according the characteristics of individual load instructions, overall performance can be improved for both the data cache and the memory system. This approach can improve some aspects of memory performance by as much as 60 percent on existing executables
  • Keywords
    cache storage; memory architecture; storage management; cache line allocation; data cache management; individual load instructions; load instructions; memory performance; memory system; performance; Bandwidth; Clocks; Computer science; Delay; Logic; Pins; Prefetching; Sun; Time measurement; Velocity measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 1995., Proceedings of the 28th Annual International Symposium on
  • Conference_Location
    Ann Arbor, MI
  • ISSN
    1072-4451
  • Print_ISBN
    0-8186-7349-4
  • Type

    conf

  • DOI
    10.1109/MICRO.1995.476816
  • Filename
    476816