A zero-mask one-time programmable memory array for RFID applications

Author

Barsatan, Randy ; Man, Tsz Yin ; Chan, Mansun

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon

fYear

2006

fDate

21-24 May 2006

Abstract

A CMOS-compatible one-time programmable (OTP) memory array for RFID applications is presented. Three zero-mask antifuse (AF) devices were evaluated on their feasibility for RFID applications. Among the AFs, the gate oxide AF device can be programmed using only 7 muW of peak power and was chosen to form the RFID memory array. A memory array architecture is presented based on a compact 2-transistor cell, together with a programming circuit that does not require special high voltage transistors and consumes zero DC current during programming. The device structures were fabricated in 0.18 mum process and were experimentally verified, while circuit simulations were performed using TSMC 0.18 mum model on Cadence Analog Artist

Keywords

CMOS memory circuits; programmable logic arrays; radiofrequency identification; random-access storage; 0.18 micron; 7 muW; CMOS-compatible one-time programmable memory array; Cadence Analog Artist; RFID memory array; circuit simulations; gate oxide antifuse device; programming circuit; zero-mask antifuse device; zero-mask one-time programmable memory array; CMOS process; CMOS technology; Circuits; Costs; Fabrication; Memory architecture; Nonvolatile memory; RFID tags; Radiofrequency identification; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1692750

Filename

1692750