A multistandard FFT processor for wireless system-on-chip implementations

Author

Chidambaram, Ramesh ; Van Leuken, Rene ; Quax, Marc ; Held, Ingolf ; Huisken, Jos

Author_Institution

Dept. of Electr. Eng., Delft Univ. of Technol.

fYear

2006

fDate

21-24 May 2006

Abstract

This paper presents a high performance FFT ASIP. The resulting programmable solution is scalable for the order of the FFT and capable of satisfying performance requirements of various OFDM wireless standards. The IEEE 802.15.3a ultra wideband OFDM - being the most time critical of these standards because of the computation of a 128-point FFT within 312.5 ns - has been the primary performance target of the scalable ASIP. The resulting ASIP adopts a vectorial ultra-long instruction word (ULIW) approach. The design decisions are evaluated with regards to processing speed, area and power dissipation

Keywords

IEEE standards; OFDM modulation; fast Fourier transforms; instruction sets; integrated circuit design; logic design; microprocessor chips; system-on-chip; ultra wideband communication; IEEE 802.15.3a; OFDM wireless standards; application specific instruction set processor; fast Fourier transform; multistandard FFT processor; ultra wideband OFDM; ultra-long instruction word; wireless system-on-chip implementations; Algorithm design and analysis; Application specific processors; Computer architecture; Design methodology; OFDM; Power dissipation; Process design; Silicon; System-on-a-chip; Ultra wideband technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1692781

Filename

1692781