Title :
How to fake 1000 registers
Author :
Oehmke, David W. ; Binkert, Nathan L. ; Mudge, Trevor ; Reinhardt, Steven K.
Author_Institution :
Adv. Comput. Archit. Lab, Michigan Univ., Ann Arbor, MI
Abstract :
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading). Support for both of these together requires a multiplicative number of registers that quickly becomes prohibitive. We overcome this limitation with the virtual context architecture (VCA), a new register-file architecture that virtualizes logical register contexts. VCA works by treating the physical registers as a cache of a much larger memory-mapped logical register space. Complete contexts, whether activation records or threads, are no longer required to reside in their entirety in the physical register file. A VCA implementation of register windows on a single-threaded machine reduces data cache accesses by 20%, providing the same performance as a conventional machine while requiring one fewer cache port. Using VCA to support multithreading enables a four-thread machine to use half as many physical registers without a significant performance loss. VCA naturally extends to support both multithreading and register windows, providing higher performance with significantly fewer registers than a conventional machine
Keywords :
cache storage; computer architecture; multi-threading; cache storage; logical registers; memory-mapped logical register space; multiple thread contexts; multithreading; register windows; register-file architecture; single-threaded machine; virtual context architecture; Computer architecture; Delay; Instruction sets; Microarchitecture; Multithreading; Out of order; Pipelines; Registers; Surface-mount technology; Yarn;
Conference_Titel :
Microarchitecture, 2005. MICRO-38. Proceedings. 38th Annual IEEE/ACM International Symposium on
Conference_Location :
Barcelona
Print_ISBN :
0-7695-2440-0
DOI :
10.1109/MICRO.2005.21