Title :
Realization of non-linear templates using the CNNUC3 prototype
Author :
Linan, G. ; Foldesy, P. ; Rodríguez-Vázquez, A. ; Espejo, S. ; Domínguez-Castro, R.
Author_Institution :
Inst. de Microelectron., CSIC, Sevilla, Spain
Abstract :
Demonstrates the processing capabilities of an analog programmable array processor chipMINUS/CNNUC3-which follows the cellular neural network Universal Machine computing paradigm. Due to its very advanced features and algorithmic capabilities, this chip has been demonstrated to be able to perform not only linear templates executions, but also to be very adequate for the implementation of non-linear templates by using a decomposition method. The paper focuses on the application examples of the execution of non-linear templates with the CNNUC3 prototype. A brief description of the theoretical background is also presented in the paper
Keywords :
analogue integrated circuits; analogue processing circuits; array signal processing; cellular neural nets; image processing; neural chips; nonlinear network synthesis; programmable circuits; CNNUC3 prototype; algorithmic capabilities; analog programmable array processor chip; cellular neural network Universal Machine; decomposition method; linear templates; nonlinear templates; Cellular neural networks; Computer networks; Electronic mail; Gray-scale; Image processing; Logic; Piecewise linear techniques; Pixel; Prototypes; Turing machines;
Conference_Titel :
Cellular Neural Networks and Their Applications, 2000. (CNNA 2000). Proceedings of the 2000 6th IEEE International Workshop on
Conference_Location :
Catania
Print_ISBN :
0-7803-6344-2
DOI :
10.1109/CNNA.2000.876848