Title :
The future evolution of high-performance microprocessors
Author_Institution :
HP Labs, Palo Alto, CA, USA
Abstract :
The evolution of high-performance microprocessors has reached several significant inflection points. First, the marginal utility of additional single-core complexity is now rapidly diminishing due to a number of factors. The increase in instructions per cycle from increases in sizes and numbers of functional units has plateaued. Meanwhile the increasing sizes of functional units and cores are having a significant negative impact on pipeline depths and the scalability of processor clock cycle times. Second, the power of high performance microprocessors has increased rapidly over the last two decades, even as device switching energies have been significantly reduced by supply voltage scaling. However future voltage scaling will be limited by minimum practical threshold voltages. Current high-performance microprocessors are already near limits of acceptable power dissipation. Thus scaling microprocessor performance while maintaining or even reducing overall power dissipation will prove especially challenging. This paper discusses these issues and propose likely scenarios for the future evolution of high-performance microprocessors.
Keywords :
clocks; computer power supplies; microprocessor chips; pipeline processing; high-performance microprocessor evolution; pipeline depths; processor clock cycle times; Circuits; Clocks; Computer architecture; Graphics; Microprocessors; Pipelines; Power dissipation; Scalability; Threshold voltage; Very large scale integration;
Conference_Titel :
Microarchitecture, 2005. MICRO-38. Proceedings. 38th Annual IEEE/ACM International Symposium on
Print_ISBN :
0-7695-2440-0
DOI :
10.1109/MICRO.2005.34