DocumentCode :
2535274
Title :
A 12-bit 300 MHz CMOS DAC for high-speed system applications
Author :
Ni, Weining ; Geng, Xueyang ; Shi, Yin ; Dai, Foster
Author_Institution :
Inst. of Semicond., Chinese Acad. of Sci., Beijing
fYear :
2006
fDate :
21-24 May 2006
Abstract :
This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binary-weighted array for 4 LSBs. In order to ensure the linearity of DAC, a double centro symmetric current matrix is designed by using the Q2 random walk strategy. To minimize the feedthrough and improve the dynamic performance, the drain of the switching transistors is isolated from the output lines by adding two cascoded transistors
Keywords :
CMOS integrated circuits; digital-analogue conversion; high-speed integrated circuits; 12 bit; 300 MHz; CMOS DAC; centro symmetric current matrix; high-speed system; switching transistors; unit current-cell matrix; Application software; Clocks; Decoding; Degradation; Delay effects; Equations; Latches; Linearity; Signal design; Symmetric matrices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1692857
Filename :
1692857
Link To Document :
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