DocumentCode
2535488
Title
An efficient test vector compression technique based on block merging
Author
El-Maleh, Aiman
Author_Institution
Dept. of Comput. Eng., King Fahd Univ. of Pet. & Minerals, Dhahran
fYear
2006
fDate
21-24 May 2006
Lastpage
1450
Abstract
In this paper, we present a new test data compression technique based on block merging. The technique capitalizes on the fact that many consecutive blocks of the test data can be merged together. Compression is achieved by storing the merged block and the number of blocks merged. It also takes advantage of cases where the merged block can be filled by all 0´s or all 1´s. Test data decompression is performed on chip using a simple circuitry that repeats the merged block the required number of times. The decompression circuitry has the advantage of being test data independent. Experimental results on benchmark circuits demonstrate the effectiveness of the proposed technique compared to previous approaches
Keywords
data compression; microprocessor chips; block merging; decompression circuitry; test data compression; test vector compression; Benchmark testing; Circuit testing; Counting circuits; DH-HEMTs; Data engineering; Merging; Minerals; Performance evaluation; Petroleum; Test data compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1692868
Filename
1692868
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