Title :
Evaluation and Compensation for Optically and Electrically Interconnected Signal Latencies
Author :
Muslim, Shirazy Md Shorab ; Lee, Tae-Woo ; Park, Hyo-Hoon
Author_Institution :
Inf. & Commun. Univ., Daejeon
Abstract :
Chip-to-chip optical and electrical interconnects have been compared to evaluate signal latencies and a novel compensation block for signal latencies is proposed in this paper using a master slave (MS) flip-flop and a delay circuit. The MS flip-flop is designed by using a new high speed latch topology that provides satisfactory performance up to 10 GHz in a commercial 0.18-mum CMOS technology.
Keywords :
CMOS integrated circuits; delay circuits; field effect MMIC; flip-flops; integrated circuit interconnections; network topology; optical interconnections; 0.18 micron; CMOS technology; block compensation; chip-to-chip optical interconnects; delay circuit; electrical interconnects; electrically interconnected signal latencies; high speed latch topology; master slave flip-flop; CMOS technology; Delay; Driver circuits; Integrated circuit interconnections; Optical attenuators; Optical crosstalk; Optical interconnections; Optical receivers; Optical transmitters; Vertical cavity surface emitting lasers; Signal latency; chip-to-chip interconnect; compensation block; conventional latch (CL); electrical interconnect; modified latch (ML); optical interconnect;
Conference_Titel :
Advanced Communication Technology, The 9th International Conference on
Conference_Location :
Gangwon-Do
Print_ISBN :
978-89-5519-131-8
DOI :
10.1109/ICACT.2007.358664
