DocumentCode
2536289
Title
Reliability analysis for defect-tolerant nano-architectures in the presence of interconnect noise
Author
Bhaduri, Debayan ; Shukla, Sandeep K.
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
fYear
2004
fDate
16-19 Aug. 2004
Firstpage
602
Lastpage
604
Abstract
Recently, we have automated a computational scheme based on Markov random field (MRF) and belief propagation algorithms in a tool code named NANOLAB to evaluate reliability of nano architectures. In this paper, we show how we extend this tool by developing libraries that automate the reliability analysis of systems in the presence of noise in the interconnects. The effectiveness of this automation is illustrated by modeling uniform and Gaussian noise and automatically deriving various reliability results for defect-tolerant architectures, such as triple modular redundancy (TMR), cascaded triple modular redundancy (CTMR) and multi-stage iterations of these. These results are used to interpret reliability/redundancy tradeoffs for these architectural configurations taking into account such noise models at the interconnects.
Keywords
Gaussian noise; Markov processes; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; integrated circuit reliability; nanotechnology; redundancy; Gaussian noise; Markov random field; cascaded triple modular redundancy; defect-tolerant nanoarchitectures; interconnect noise; multistage iterations; propagation algorithms; redundancy; reliability; Automation; Belief propagation; Computer architecture; Distributed computing; Entropy; Gaussian noise; Libraries; Markov random fields; Nanotechnology; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2004. 4th IEEE Conference on
Print_ISBN
0-7803-8536-5
Type
conf
DOI
10.1109/NANO.2004.1392433
Filename
1392433
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