Title :
Low-power and low-latency cluster topology for local traffic NoCs
Author :
Saneei, Mohsen ; Afzali-Kusha, Ali ; Navabi, Zainalabedin
Author_Institution :
Sch. of Electr. & Comput. Eng., Tehran Univ.
Abstract :
In this paper, we introduce a topology for network on chips that is named cluster-mesh (CM) topology. This architecture reduces dynamic and static power consumption in NoCs and can reduce latency of communications in low traffic or local traffic applications. With cluster-mesh topology, area reduction in routers is about 44% and in links we can save more than 50% in area too. The dynamic power in this architecture is reduced more than 20%. The idea of clustering may be applied to some other topologies such as Torus and Octagon
Keywords :
integrated circuit design; low-power electronics; network topology; network-on-chip; cluster topology; cluster-mesh topology; dynamic power consumption; network on chips; routers; static power consumption; Computer architecture; Computer networks; Delay; Energy consumption; Nanoelectronics; Network topology; Network-on-a-chip; Scalability; Telecommunication traffic; Wires;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1692938
