DocumentCode :
2537201
Title :
A 24-GHz phased-array receiver in 0.13-µm CMOS using an 8-GHz LO
Author :
Patnaik, Satwik ; Harjani, Ramesh
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA
fYear :
2010
fDate :
23-25 May 2010
Firstpage :
465
Lastpage :
468
Abstract :
This paper presents a 24-GHz two-channel phased-array receiver. The receiver adopts the LO-phase-shifting approach and employs a sub-harmonically injection-locked phase-shifter. A CMOS-only prototype, fabricated in a 130-nm SiGe BiCMOS technology, draws 16-mA of current from a 1.5-V supply and consists of a injection-locked oscillator (operating as a phase-shifter, LO-buffer and frequency multiplier), a down-conversion mixer and an IF-buffer. The worst-case measured amplitude and phase errors are 1.5-dB and 4°. The two-channel receiver occupies an active area of 0.23-mm2.
Keywords :
CMOS integrated circuits; Ge-Si alloys; injection locked oscillators; phase shifters; BiCMOS technology; IF-buffer; LO-phase-shifting approach; complementary metal-oxide-semiconductor integrated circuits; current 16 mA; down-conversion mixer; frequency 24 GHz; injection-locked oscillator; injection-locked phase-shifter; phase error; size 130 nm; two-channel phased-array receiver; voltage 1.5 V; BiCMOS integrated circuits; CMOS process; CMOS technology; Frequency; Injection-locked oscillators; Millimeter wave technology; Phase measurement; Prototypes; Radar imaging; Wireless communication; CMOS; injection-locked oscillator (ILO); mm-wave; phased-array; sub-harmonic injection-locking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE
Conference_Location :
Anaheim, CA
ISSN :
1529-2517
Print_ISBN :
978-1-4244-6240-7
Type :
conf
DOI :
10.1109/RFIC.2010.5477267
Filename :
5477267
Link To Document :
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