Title :
Vast-fast low-triggering LTdSCR ESD protection structure for RF ICs in CMOS
Author :
Liu, Jian ; Lin, Lin ; Xin Wang ; Zhao, Hui ; Tang, He ; Fang, Qiang ; Wang, Xin ; Chen, Hongyi ; Xie, Haolu ; Fan, Siqiang ; Zhao, Bin ; Zhang, Gary
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Riverside, CA, USA
Abstract :
This paper reports design of a novel low-parasitic ultra-low-triggering voltage dual-directional LTdSCR ESD protection structure in foundry CMOS. It features programmable low triggering voltage of 4.7~6V, low discharging resistance of ~0.77Ω, low leakage of ~0.1nA, extremely low parasitic capacitance of ~10fF and ultra fast response of ~100ps. it achieves ESD protection of >7.8kV HBM and ~500V CDM for a 90μm device. Measurement matches simulation very well. This low-parasitic low-triggering ESD protection structure is suitable for high data rate and low-voltage RF ICs in CMOS.
Keywords :
CMOS integrated circuits; electrostatic discharge; thyristors; complementary metal-oxide-semiconductor integrated circuits; discharging resistance; dual-directional LTdSCR ESD protection structure; foundry CMOS; leakage; low voltage RF IC; parasitic capacitance; vast-fast low-triggering LTdSCR ESD protection structure; voltage 4.7 V to 6 V; Breakdown voltage; Electric breakdown; Electrostatic discharge; Foundries; Low voltage; Parasitic capacitance; Protection; Radio frequency; Radiofrequency integrated circuits; Thyristors; CMOS; ESD; RF IC; SCR; low-parasitic;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-6240-7
DOI :
10.1109/RFIC.2010.5477278
