Title :
Optimal shielding insertion for inductive noise avoidance
Author :
Yan, Jin-Tai ; Lin, Kuen-Ming ; Chen, Yen-Hsiang
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Chung-Hua Univ., Hsinchu
Abstract :
In this paper, given a set of parallel wires between a pair of adjacent P/G lines, according to the definition and computation of the inductive noise and the classification of violation wires, an O(n) optimal approach is proposed to insert shields into these parallel wires for the avoidance of inductive noise, where n is the number of a set of given parallel wires. The experimental results show that our proposed approach can use less CPU time to minimize the number of inserted shields for the avoidance of inductive noise
Keywords :
circuit complexity; clocks; integrated circuit interconnections; integrated circuit noise; shielding; O(n) optimal approach; P/G lines; inductive noise avoidance; optimal shielding insertion; parallel wires; violation wires; Computer science; Concurrent computing; Design engineering; Inductance; Noise reduction; Routing; Wires;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1692956
