Low-voltage floating-gate CMOS buffer

Author

Özalevli, Erhan ; Qureshi, Muhammad S. ; Hasler, Paul E.

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA

fYear

2006

fDate

21-24 May 2006

Lastpage

1875

Abstract

This paper describes an implementation of a low-voltage CMOS buffer employing a negative feedback to improve its performance. Floating-gate transistors are incorporated to obtain low-threshold transistors and to increase the input/output voltage swing of the circuit operating at 1.2V. The designed circuit is fabricated in 0.5mum CMOS process, and occupies 0.0214mm². It achieves total harmonic distortion (THD) of 48dB for 10kHz 0.6V_pp sinusoidal input signal

Keywords

CMOS analogue integrated circuits; buffer circuits; circuit feedback; harmonic distortion; low-power electronics; 0.5 micron; 0.6 V; 1.2 V; 10 kHz; CMOS process; THD; floating-gate CMOS buffer; floating-gate transistors; input voltage swing; low-threshold transistors; low-voltage CMOS buffer; negative feedback; output voltage swing; sinusoidal input signal; total harmonic distortion; Analog circuits; CMOS process; CMOS technology; Feedback circuits; Low voltage; MOSFETs; Negative feedback; Operational amplifiers; Threshold voltage; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1692974

Filename

1692974