Title :
Co-design considerations for frequency drift compensation in BAW-based time reference application
Author :
Razafimandimby, S. ; Petit, D. ; Bar, P. ; Joblot, S. ; Carpentier, J.-F. ; Morelle, J. ; Arnaud, C. ; Parat, G. ; Garcia, P. ; Garnier, C.
Author_Institution :
STMicroelectronics, Crolles, France
Abstract :
In order to take up the challenge of BAW-based time reference, this paper presents new BAW/Integrated Circuits (IC) co-integration considerations. For the demonstration, a SiP approach is proposed where the Solidly Mounted Resonator (SMR) has been directly flip-chipped on the top of the IC. This 2.5 GHz oscillator reaches a -93 dBc/Hz phase noise at a 2 kHz carrier offset for a 7.3 mW power consumption. A 5 bit switched capacitor bank permits to correct process deviations with a 12.5 kHz accuracy while a varactor capacitance allows compensating a SMR with a -4.2 ppm/°C Temperature Coefficient of Frequency (TCF) in a [-40°C,85°C] temperature range.
Keywords :
UHF oscillators; acoustic resonators; bulk acoustic wave devices; capacitor switching; compensation; flip-chip devices; integrated circuit design; phase noise; system-in-package; varactors; BAW VCO; BAW resonator; BAW-based time reference; SiP approach; bulk acoustic wave resonator; directly flip-chip devices; frequency 12.5 kHz; frequency 2.5 GHz; frequency drift compensation codesign; integrated circuit co-integration; oscillator; phase noise; power 7.3 mW; power consumption; solidly mounted resonator; switched capacitor bank; temperature coefficient of frequency; varactor capacitance; Bills of materials; Capacitors; Electrodes; Impedance; Integrated circuit technology; Mechanical energy; Phase noise; Resonant frequency; Temperature distribution; Voltage-controlled oscillators; BAW; SMR; Time reference; frequency accuracy; low phase noise; thermal stability;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-6240-7
DOI :
10.1109/RFIC.2010.5477303
