Realization and optimization of DSP based H.264 encoder

H.264 is a very efficient video compression standard. In this paper, a scheme of H.264 encoder implementation based on TMS320C6416 DSP is presented. The structure hardware, the developing platform, the procedure of code immigration and many optimizing methods are discussed. The optimization based on the extended instruction set of C64x for the critical time consuming modules, the scheduling of data rolled-in and rolled-out, and the exploitation of the limited on-chip storage resources are studied in detail to accelerate encoding speed. The experiment results have shown that the proposed H.264 encoder can encode QCIF image sequences in real-time speed with high image quality and compression efficiency. The proposed H.264 encoder can be employed in many real-time applications