DocumentCode :
2538321
Title :
Recessed-gate GaN MESFET using ICP-RIE for high temperature microwave applications
Author :
Lee, C. ; Lu, W. ; Piner, E. ; Adesida, I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
fYear :
2000
fDate :
19-21 June 2000
Firstpage :
41
Lastpage :
42
Abstract :
In this paper, for the first time, we present the DC and RF performances of recessed-gate GaN MESFETs fabricated using ICP-RIE. This recessed gate process has enabled GaN MESFETs to achieve the highest frequency results compared to those previously reported. The MESFET layer used in the study was grown on a sapphire substrate by metal organic chemical vapor deposition (MOCVD). The epilayer consisted of a 2 /spl mu/m semi-insulating GaN buffer, a 200 nm lightly-doped (/spl sim/2/spl times/10/sup 17/ cm/sup -3/) channel, and a 40 nm heavily-doped (>5/spl times/10/sup 18/ cm/sup -3/) GaN cap layer. Mesa isolation was achieved using ICP-RIE in a Cl/sub 2/-Ar plasma. The source and drain ohmic contacts were formed using alloyed Ti/Al/Ti/Au metallization. PECVD-deposited Si/sub 3/N/sub 4/ was used as an etch mask for the gate-recess etch. Then, electron beam lithography was used to pattern 1 /spl mu/m recess windows centered between the source and drain in the Si/sub 3/N/sub 4/ mask. Gate recessing was performed using ICP-RIE in a Cl/sub 2/-Ar plasma at 5 mT and -50 V bias. The drain current was monitored during recessing. The drain current decreased significantly at the beginning and saturated when the cap layer was completely removed. After recess, the Si/sub 3/N/sub 4/ was removed. The sample was then rapid-thermally-annealed to eliminate etch-induced defects. Finally, a mushroom-shaped 0.25 /spl mu/m Ni-Au Schottky gate was fabricated by electron beam lithography. The device width was 100 /spl mu/m while the source-drain spacing was 3 /spl mu/m.
Keywords :
III-V semiconductors; MOCVD; Schottky gate field effect transistors; electron beam lithography; gallium compounds; high-temperature techniques; isolation technology; masks; microwave field effect transistors; ohmic contacts; plasma materials processing; semiconductor device measurement; semiconductor device metallisation; sputter etching; vapour phase epitaxial growth; wide band gap semiconductors; -50 V; 0.25 micron; 1 micron; 100 micron; 2 micron; 200 nm; 3 micron; 40 nm; 5 mT; Al/sub 2/O/sub 3/; Cl/sub 2/-Ar; Cl/sub 2/-Ar plasma; DC performance; GaN MESFETs; GaN-Al/sub 2/O/sub 3/; ICP-RIE; MESFET layer; MOCVD; Ni-Au; PECVD-deposited Si/sub 3/N/sub 4/ etch mask; RF performance; Si/sub 3/N/sub 4/ mask; Ti-Al-Ti-Au; alloyed Ti/Al/Ti/Au metallization; cap layer removal; device width; drain current; drain ohmic contact; electron beam lithography; etch-induced defects; gate-recess etch; heavily-doped GaN cap layer; high temperature microwave applications; lightly-doped channel; mesa isolation; metal organic chemical vapor deposition; mushroom-shaped Ni-Au Schottky gate; rapid thermal anneal; recess window patterning; recessed gate process; recessed-gate GaN MESFET; sapphire substrate; semi-insulating GaN buffer; source ohmic contact; source-drain spacing; Electron beams; Etching; Gallium nitride; Lithography; MESFETs; Organic chemicals; Plasma applications; Plasma sources; Plasma temperature; Radio frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference, 2000. Conference Digest. 58th DRC
Conference_Location :
Denver, CO, USA
Print_ISBN :
0-7803-6472-4
Type :
conf
DOI :
10.1109/DRC.2000.877080
Filename :
877080
Link To Document :
بازگشت