A Study of Implementation of IEEE 802.11 a Physical Layer on a Heterogeneous Reconf1gurable Platform

Author

Niktash, Afshin ; Parizi, Hooman ; Bagherzadeh, Nader

Author_Institution

California Univ., Irvine, CA

Volume

3

fYear

2007

fDate

12-14 Feb. 2007

Firstpage

2101

Lastpage

2105

Abstract

Reconfigurable architectures can be effectively employed in multimode wireless platforms. A heterogeneous reconfigurable system (HERS) is presented in this work which is composed of a number of heterogeneous reconfigurable engines controlled by a RISC processor and connected through a high speed bus. Every reconfigurable engine targets a class of algorithms. M2 and RECFEC are two reconfigurable engines employed in HERS to perform the baseband processing of a soft implementation of IEEE 802.11a wireless LAN. M2 handles the modem processing and RECFEC performs the channel coding.

Keywords

channel coding; error correction codes; forward error correction; reconfigurable architectures; reduced instruction set computing; system buses; wireless LAN; IEEE 802.11a physical layer; RISC processor; channel coding; heterogeneous reconfigurable system; high speed bus; modem processing; wireless LAN; Baseband; Channel coding; Engines; Modems; Physical layer; Reconfigurable architectures; Reduced instruction set computing; Signal processing algorithms; Wireless LAN; Wireless communication; IEEE 802.11a; Reconfigurable architecture; channel coding; modem;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Communication Technology, The 9th International Conference on

Conference_Location

Gangwon-Do

ISSN

1738-9445

Print_ISBN

978-89-5519-131-8

Type

conf

DOI

10.1109/ICACT.2007.358786

Filename

4195588