Title :
A new self-aligned top-gate polysilicon TFT architecture for low temperature processing
Author :
Fulks, R.T. ; Ho, J. ; Boyce, J.B.
Author_Institution :
Xerox Palo Alto Res. Center, CA, USA
Abstract :
Summary form only given. Laser crystallized polysilicon thin film transistors (TFTs) have been found attractive for active matrix addressing with integrated drivers on low temperature glass substrates and more recently on plastic substrates. The TFT process typically uses a top gate self-aligned architecture with a laser crystallization channel anneal and a thermal doping activation anneal. For very low temperature processing, two laser anneal steps are required (Carey et al, 1997). In this work, we have developed a new self-aligned TFT architecture that requires only a single laser process step to achieve simultaneous crystallization and doping. It also has the advantage of allowing an efficient hydrogen passivation step early in the process.
Keywords :
crystallisation; doping profiles; elemental semiconductors; laser beam annealing; passivation; semiconductor device measurement; silicon; thin film transistors; H/sub 2/; Si; TFT process; active matrix addressing; hydrogen passivation step; integrated drivers; laser anneal steps; laser crystallization channel anneal; laser crystallized polysilicon TFTs; laser crystallized polysilicon thin film transistors; low temperature glass substrates; low temperature processing; plastic substrates; self-aligned TFT architecture; self-aligned top-gate polysilicon TFT architecture; simultaneous crystallization/doping; single laser process step; thermal doping activation anneal; top gate self-aligned architecture; very low temperature processing; Active matrix addressing; Annealing; Crystallization; Doping; Driver circuits; Glass; Plastics; Substrates; Temperature; Thin film transistors;
Conference_Titel :
Device Research Conference, 2000. Conference Digest. 58th DRC
Conference_Location :
Denver, CO, USA
Print_ISBN :
0-7803-6472-4
DOI :
10.1109/DRC.2000.877107