DocumentCode
2539008
Title
Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs
Author
Tajalli, Armin ; Muller, Paul ; Atarodi, Mojtaba ; Leblebici, Yusuf
Author_Institution
Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran
fYear
2006
fDate
21-24 May 2006
Abstract
This paper presents an approach to analyzing and modeling of gated-oscillator (GO) -based CDRs and predicting their performance aspects such as jitter tolerance (JTOL) and frequency tolerance (FTOL). It is shown that high JTOL of this topology in addition to their acceptable FTOL and flexible topology, have made them very suitable for short-haul multi-rate applications
Keywords
clocks; jitter; network analysis; network topology; oscillators; synchronisation; CDR circuits; clock and data recovery circuits; frequency tolerance; gated oscillators; jitter tolerance; Bit error rate; Circuit topology; Clocks; Delay; Frequency; Jitter; Microelectronics; Oscillators; Sampling methods; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693033
Filename
1693033
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