Title :
A 6.1 GS/s 52.8 mW 43 dB DR 80 MHz bandwidth 2.4 GHz RF bandpass ΔΣ ADC in 40 nm CMOS
Author :
Ryckaert, Julien ; Geis, Arnd ; Bos, Lynn ; Van der Plas, G. ; Craninckx, Jan
Author_Institution :
Interuniversity Microelectron. Center (IMEC), Leuven, Belgium
Abstract :
A 2.4 GHz 4th order BP ΔΣ ADC is presented. The feedforward topology uses Gm-LC resonators that can be calibrated in frequency. The quantizer is split in 6 interleaved comparators to relax speed. Clocked at 6.1 GHz, it achieves a DR of 43 dB in 80 MHz consuming 52.8 mW. Implemented in 40 nm CMOS, it achieves a FoM of 3.6 pJ/conv. step, which is to date the lowest published value for RF BP ADCs.
Keywords :
CMOS digital integrated circuits; UHF filters; UHF integrated circuits; analogue-digital conversion; band-pass filters; comparators (circuits); delta-sigma modulation; resonators; 4th order BP ΔΣ ADC; CMOS; Gm-LC resonators; RF bandpass ΔΣ ADC; bandwidth 80 MHz; feedforward topology; frequency 2.4 GHz; frequency 6.1 GHz; interleaved comparators; power 52.8 mW; quantizer; size 40 nm; Band pass filters; Bandwidth; Calibration; Capacitors; Circuits; Clocks; Dynamic range; Feedback loop; Radio frequency; Resonator filters; ΔΣ ADC; RF bandpass filters; high-speed comparators;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-6240-7
DOI :
10.1109/RFIC.2010.5477374
