IC compatible top down process for Silicon Nanowire fet arrays with three {100} surfaces for (BIO) chemical sensing

We report on a relatively simple and cost-effective method for fabrication of Silicon Nanowire Field-Effect Transistor (SiNW FET) arrays with three {100} surfaces via IC-compatible, top-down processes. Devices fabricated with this process offers an extra advantage compared to other top down fabrication techniques by not just only offering one or two, but instead three well-defined surfaces. The method offers a precise control of the NWs width (down to sub-100nm) without the need for nanolithography. In addition, very smooth and straight sidewalls are obtained. The process flow requires just one mask step and room-temperature, wet etching for the nanowire patterning and is thus suitable for wafer-scale fabrication of nanowires arrays. Device characterization includes electrical characterization and pH measurements were performed using the fabricated SiNW FET arrays.