DocumentCode :
2540636
Title :
Fully parallel single and two-stage associative memories for high speed pattern matching
Author :
Abedin, Md Anwarul ; Koide, Tetsushi ; Mattausch, Hans Juergen
Author_Institution :
Dhaka Univ. of Eng. & Technol., Gazipur
fYear :
2008
fDate :
20-22 Dec. 2008
Firstpage :
291
Lastpage :
296
Abstract :
A hardware realization of single and two-stage fully parallel associative memories for high speed reliable pattern matching is proposed. We have designed, fabricated and tested the single stage associative memory test chip designed in 0.35 mum two-poly, three-metal CMOS technology which gives very high speed pattern matching performance. But in some applications single stage search or single winner search makes the system less reliable. To increase the reliability of pattern matching system, we have also introduced a cascaded fully parallel associative memory with two-stage winner search. In two-stage pattern matching architecture we have used two different types of associative memories. One is based on the k-nearest-matches search and other one is a special type of associative memory in which winner search is done only among the activated reference patterns. The activation in the second associative memory is done by first associative memory after searching the k-nearest-matches. We have already designed, fabricated and tested the associative memories separately. The complete two-stage pattern matching system is tested here with MATLAB software and hardware realization is currently under the design process.
Keywords :
CMOS memory circuits; content-addressable storage; data compression; image coding; image matching; MATLAB software; hardware; high speed reliable pattern matching; k-nearest-matches search; single stage fully parallel associative memories; three-metal CMOS technology; two-stage fully parallel associative memories; two-stage winner search; Associative memory; CMOS technology; Circuit testing; Concurrent computing; DH-HEMTs; Digital circuits; Euclidean distance; Hamming distance; Hardware; Pattern matching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 2008. ICECE 2008. International Conference on
Conference_Location :
Dhaka
Print_ISBN :
978-1-4244-2014-8
Electronic_ISBN :
978-1-4244-2015-5
Type :
conf
DOI :
10.1109/ICECE.2008.4769219
Filename :
4769219
Link To Document :
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