Title :
Phase noise reduction in CMOS LC oscillators using tail noise shaping and Gm3 boosting
Author :
Jainwal, Kapil ; Mukherjee, Jayanta
Author_Institution :
Electr. Eng., Indian Inst. of Technol., Mumbai
Abstract :
This paper presents a new technique for Low-Phase Noise CMOS Quadrature differential oscillator with better phase noise. The design uses tail noise shaping along with Gm3 boosting circuit and third harmonic tuned LC tank for improved phase noise performance. The proposed quadrature oscillator circuit shows a 4 dB phase noise improvement over standard fixed bias quadrature oscillator. Post Layout Simulation results in a 0.18-um CMOS fabrication process show that the phase noise of the proposed quadrature oscillator to be - 114 dBc/Hz at 1-MHz frequency offsets respectively at a center frequency of 5-GHz. The improvement is higher than the sum of reductions provided by the individual techniques. The power consumed increases by a very small amount and thus the Figure of Merit (FOM) shows a 4 dB improvement.
Keywords :
CMOS integrated circuits; circuit noise; oscillators; phase noise; CMOS quadrature differential oscillator; Gm3 boosting circuit; figure of merit; noise figure 4 dB; phase noise reduction; tail noise shaping; third harmonic tuned LC tank; Boosting; CMOS process; Circuit noise; Circuit simulation; Frequency; Noise shaping; Oscillators; Phase noise; Tail; Tuned circuits;
Conference_Titel :
Electrical and Computer Engineering, 2008. ICECE 2008. International Conference on
Conference_Location :
Dhaka
Print_ISBN :
978-1-4244-2014-8
Electronic_ISBN :
978-1-4244-2015-5
DOI :
10.1109/ICECE.2008.4769221