Title :
A fully digital nonlinear, high-speed Rank Order Filter in 0.18μm CMOS technology
Author :
Toscano, George John ; Saha, Pran Kanai
Author_Institution :
American Int. Univ.
Abstract :
Some efficient techniques to realize modular, high-speed digital rank order filter (ROF) are presented in this paper. Using the proposed digital filters, it is possible to find the element of a certain rank (Maximum, Minimum and Median) in a given sequence of N elements in each window in M steps, where M is the number of bits used in binary representation for the elements of the sequence. A bit-level algorithm by Kar and Pradhan has been modified in this work to implement the proposed filters. The modified algorithm is implemented using N number of identical bit update circuit (BUC) along with other logic gates in 0.18 mum CMOS technology. The proposed ROF circuits are simulated using HSPICE. Simulation results depict the good performance of the filters in terms of speed and power. The ROF algorithm is also tested in FPGA. The post fit simulation output using Xilinx is presented in this paper. In both simulations the ROFpsilas performance is gratifying.
Keywords :
CMOS integrated circuits; SPICE; digital filters; high-speed integrated circuits; logic circuits; CMOS technology; HSPICE simulation; ROF circuits; Xilinx simulation; bit-level algorithm; fully digital nonlinear-high-speed rank order filter; identical bit update circuit; logic gates; size 0.18 mum; Algorithm design and analysis; CMOS logic circuits; CMOS technology; Circuit simulation; Circuit testing; DH-HEMTs; Digital filters; Field programmable gate arrays; Logic gates; Nonlinear filters;
Conference_Titel :
Electrical and Computer Engineering, 2008. ICECE 2008. International Conference on
Conference_Location :
Dhaka
Print_ISBN :
978-1-4244-2014-8
Electronic_ISBN :
978-1-4244-2015-5
DOI :
10.1109/ICECE.2008.4769225
