DocumentCode
2540933
Title
Synthesis of a current source using a formal design methodology
Author
Pappu, Anand M. ; Apsel, Alyssa B.
Author_Institution
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY
fYear
2006
fDate
21-24 May 2006
Abstract
In this paper we present our work on variation-tolerant current source design. The three-transistor-plus-resistor circuit we present, offers more than 2times reduction in standard deviation of the output current at reduced circuit complexity (in a 0.18mum technology). Moreover, our circuit can be used to mirror a reference current at various locations on the die without incurring mismatches due to process variations while requiring minimum voltage headroom and layout area. The circuit topology itself is derived from a formal methodology presented here
Keywords
analogue circuits; circuit complexity; network synthesis; network topology; 0.18 micron; circuit complexity; circuit synthesis; circuit topology; formal design methodology; variation-tolerant current source design; Bandwidth; Circuit synthesis; Circuit topology; Complexity theory; Design engineering; Design methodology; Feedback circuits; Photonic band gap; Robustness; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693128
Filename
1693128
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