DocumentCode
2541870
Title
Reed-Solomon decoders for the read-write channel
Author
Popovici, E.M. ; Fitzpatrick, P. ; Murphy, C.C.
Author_Institution
Nat. Microelectron. Res. Centre, Cork, Ireland
fYear
1998
fDate
36043
Firstpage
42614
Lastpage
42618
Abstract
Presents a hardware implementation of the Fitzpatrick algorithm (denoted by F) for solving the key equation in Reed-Solomon decoding. In addition, comparisons with the Berlekamp Massey (denoted by BM) algorithm in terms of area (FPGA resources) and speed are made. It is shown that use of the division free F algorithm results in both area and speed improvements in PRML systems
Keywords
Reed-Solomon codes; FPGA resources; Fitzpatrick algorithm; PRML systems; Reed-Solomon decoders; area; division free F algorithm; read-write channel; speed;
fLanguage
English
Publisher
iet
Conference_Titel
Systems on a Chip (Ref. No. 1998/439), IEE Colloquium on
Conference_Location
Dublin
Type
conf
DOI
10.1049/ic:19980663
Filename
744467
Link To Document