Title :
A sigma delta PLL for a DAB audio decoder
Author :
Monahan, Peter ; Farrelly, Declan ; O´hEarcain, N. ; Ryan, John ; Cahill, Ciaran ; Smyth, Mark
Author_Institution :
Silicon Syst. Design Ltd., Dublin, Ireland
Abstract :
This paper describes a PLL which is part of a single chip MPEG 2 Layer III audio decoder. The PLL can generate any frequency over its operational range of 70 to 140 MHz to an accuracy of greater than 100 ppm while meeting stringent audio jitter requirements. The PLL and decoder were fabricated on a 5 metal layer 0.35 μm CMOS process. The PLL´s loop filter was also integrated on the chip, so providing a single chip solution
Keywords :
digital audio broadcasting; 0.35 micron; 70 to 140 MHz; CMOS process; jitter; loop filter; sigma delta PLL; single chip MPEG 2 Layer III DAB audio decoder;
Conference_Titel :
Systems on a Chip (Ref. No. 1998/439), IEE Colloquium on
Conference_Location :
Dublin
DOI :
10.1049/ic:19980673
