DocumentCode
2543227
Title
Analog circuit sizing with dynamic search window
Author
Tomohiro, Fujita ; Osamu, Iiduka
Author_Institution
Dept. of VLSI Syst. Design, Ritsumeikan Univ., Shiga
fYear
2006
fDate
21-24 May 2006
Abstract
In this paper an optimization method for analog circuit sizing is proposed. The proposed method is an estimation based method, and our goal is to achieve analog circuit sizing with practical computational cost. In order to apply the stochastic process model, which is used to estimate the objective function, to practical problems of analog circuit sizing, we propose the method with a dynamic search window. The experimental result shows that the analog sizing of OPAMP was performed with 253 SPICE simulations and its CPU time was 9,430 seconds. This result illustrates the efficiency of our method
Keywords
analogue circuits; circuit optimisation; integrated circuit design; stochastic processes; 9430 sec; analog circuit sizing; dynamic search window; operational amplifiers; optimization method; stochastic process model; Analog circuits; Analog computers; Capacitance; Circuit simulation; Circuit synthesis; Circuit topology; Computational efficiency; Cost function; Optimization methods; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693242
Filename
1693242
Link To Document