A tool for design exploration and power optimization of CMOS RF circuits blocks

Author

Barboni, Leonardo ; Fiorelli, Rafaella ; Silveira, Fernando

Author_Institution

Instituto de Ingenieria Electrica, Univ. de la Republica

fYear

2006

fDate

21-24 May 2006

Lastpage

2964

Abstract

A tool that explores the design space of basic RF circuit blocks is presented. The tool takes advantage of the application of an MOS transistor model continuous in all inversion levels (weak to strong inversion). The performance of the circuit is analyzed in the I_D-g_m/I_D plane. The tool shows the existence of an inversion level that provides an optimum in the power consumption for a given gain and frequency. Examples are presented showing how comparison of the performance of different technologies or evaluation of the effect of parasitic elements can be easily done. The tool is applied to the design of a power amplifier and a VCO at 910 MHz in 0.35 mum CMOS technology. The tools estimations are checked against simulations using BSIM3v3, showing very good agreement. Additionally, preliminary experimental results are presented

Keywords

CMOS integrated circuits; integrated circuit design; low-power electronics; radiofrequency integrated circuits; 0.35 micron; 910 MHz; BSIM3v3; CMOS RF circuits blocks; CMOS technology; I_D-g_m-I_D plane; MOS transistor model; VCO; power amplifier; power optimization; CMOS technology; Circuit analysis; Design optimization; Energy consumption; MOSFETs; Performance analysis; Power amplifiers; Radio frequency; Semiconductor device modeling; Space exploration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693246

Filename

1693246