A physics-based simple series resistance extraction methodology

Series resistance has become a serious obstacle encountered in the development of advanced CMOS devices. At the same time, series resistance quantification in these same advanced CMOS devices is a difficult challenge. In this study, we demonstrate a very simple series resistance extraction procedure which is derived from the ratio of two linear I_D-V_G measurements on a single device. The physics of this method is intuitively simple and the assumptions readily justifiable. The validity of this technique has been verified by a self-consistent methodology as well as the reproduction of a known external series resistance.