Bit-modular defect/fault-tolerant convolvers

Author

Dadda, Luigi ; Piuri, Vincenzo

Author_Institution

Dipartimento di Elettronica e Inf., Politecnico di Milano, Italy

fYear

1995

fDate

13-15 Nov 1995

Firstpage

90

Lastpage

98

Abstract

Design of a family of high-throughput modular convolvers is discussed, with particular reference to the defect and fault tolerance issues. The proposed architecture is based on parallel computation for the individual operands´ bits with final merging of the partial results. Different degrees of defect/fault tolerance are considered for different production and operational environments. Modularity is exploited to support also functional adaptability

Keywords

VLSI; convolution; digital signal processing chips; fault tolerant computing; parallel architectures; pipeline processing; wafer-scale integration; bit-modular convolvers; defect issues; fault tolerance issues; functional adaptability; high-throughput convolvers; operational environments; parallel computation; partial results; production environments; Complexity theory; Computer architecture; Concurrent computing; Convolution; Convolvers; Degradation; Delay; Fault tolerance; Merging; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1995. Proceedings., 1995 IEEE International Workshop on,

Conference_Location

Lafayette, LA

ISSN

1550-5774

Print_ISBN

0-8186-7107-6

Type

conf

DOI

10.1109/DFTVS.1995.476941

Filename

476941