A quad-band receiver for GSM/GPRS/EDGE in 90 nm digital CMOS

Author

Dulger, F. ; Fang, Sher Jiun ; Mohieldin, Ahmed Nader ; Fontaine, Paul ; Bellaouar, Abdellatif ; Frechette, Michel

Author_Institution

Wireless Terminals Bus. Unit, Texas Instrum. Inc., Dallas, TX

fYear

2006

fDate

21-24 May 2006

Abstract

A quad-band GSM/GPRS/EDGE receiver front-end including I and Q ADCs designed in 90nm digital CMOS technology is presented. The low band receiver designed for GSM850/GSM900 achieves 33dB gain, 1.9dB noise figure, 7.5dB of noise figure under blocking condition and -20dBm of in-band IIP3 with a power of 68mW, while the high band DCS/PCS receiver achieves 32dB gain, 2.2dB noise figure, 9.3dB of noise figure under blocking condition and -20dBm of in-band IIP3 with a power of 72mW. Total active area occupies 3mm²

Keywords

3G mobile communication; CMOS digital integrated circuits; analogue-digital conversion; cellular radio; low noise amplifiers; radio receivers; 1.9 dB; 2.2 dB; 32 dB; 33 dB; 68 mW; 7.5 dB; 72 mW; 9.3 dB; 90 nm; GSM/GPRS/EDGE; GSM850/GSM900; analog-to-digital converter; digital CMOS technology; low band receiver; quad-band receiver; receiver front-end; Baseband; CMOS technology; Distributed control; GSM; Ground penetrating radar; Linearity; Low-noise amplifiers; Noise figure; Personal communication networks; Radio frequency; ADC; EDGE; GPRS; GSM; IIP3; LNA; LO leakage; Mixer; RF CMOS; noise figure; noise figure under blocking condition; receiver;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693270

Filename

1693270