DocumentCode :
2543840
Title :
Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process
Author :
Sinha, Subarna ; Luo, Jianfeng ; Chiang, Charles
Author_Institution :
Synopsys Inc., Mountain View, CA
fYear :
2007
fDate :
23-26 Jan. 2007
Firstpage :
1
Lastpage :
6
Abstract :
Thickness range, i.e. the difference between the highest point and the lowest point of the chip surface, is a key indicator of chip yield. This paper presents a novel metal filling algorithm that seeks to minimize the thickness range of the chip surface during the copper damascene process. The proposed solution considers the physical mechanisms in the damascene process, namely ECP (which is the process used to deposit Cu in the trenches) and CMP (which is the process used to polish Cu after ECP), that affect thickness range. Key predictors for the final thickness range, which is the thickness range after ECP and CMP, that can be computed efficiently are identified and used to drive the metal filling process. To the best of our knowledge, this is the first metal filling algorithm that uses an ECP model among other things to guide metal filling. Experimental results are very promising and indicate that the proposed method can significantly reduce the thickness range after metal filling. This is in sharp contrast with the density-driven approaches which often increase the thickness range after metal filling, thereby potentially adversely impacting yield. In addition, the proposed method inserts significantly smaller amount of fill when compared to the density-driven approaches. This is desirable as it limits the impact of metal filling on timing.
Keywords :
chemical mechanical polishing; copper; electroplating; integrated circuit yield; manufacturing processes; planarisation; surface topography; CMP process; Cu; ECP model; copper damascene process; improved chip surface uniformity; metal filling algorithm; model based layout pattern; physical mechanisms; Copper; Dielectric materials; Fabrication; Filling; Inorganic materials; Planarization; Surface resistance; Surface topography; Timing; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
1-4244-0629-3
Electronic_ISBN :
1-4244-0630-7
Type :
conf
DOI :
10.1109/ASPDAC.2007.357783
Filename :
4195987
Link To Document :
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