DocumentCode
2544201
Title
Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation
Author
Fukuda, Satoshi ; Kawazoe, Daisuke ; Okada, Kenichi ; Masu, Kazuya
Author_Institution
Integrated Res. Inst., Tokyo Inst. of Technol., Yokohama
fYear
2007
fDate
23-26 Jan. 2007
Firstpage
104
Lastpage
105
Abstract
This paper proposes a self compensation technique. For LNAs, large power gain and large input signal results in too large output signal and distortion. To make matters worse, input power varies by process variation, temperature, simulation error, and so on. To solve the problem, the proposed LNA is equipped with variable bias circuit and can be reconfigured by bias voltage of transistors. It contributes to power reduction, compensation of intermodulation. The proposed LNA achieves more than 33 dBm in DeltaIM3, if the input power increases more than -30 dBm. Moreover the output power is less than about -12 dBm, which is 87 % of power reduction.
Keywords
CMOS integrated circuits; compensation; low noise amplifiers; intermodulation compensation; power reduction; reconfigurable CMOS low noise amplifier; self compensation; variable bias circuit; CMOS memory circuits; CMOS process; Circuit noise; Degradation; Flexible printed circuits; Low-noise amplifiers; Power generation; Radio frequency; Temperature sensors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
1-4244-0629-3
Electronic_ISBN
1-4244-0630-7
Type
conf
DOI
10.1109/ASPDAC.2007.357962
Filename
4196008
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