A highly-integrated wireless configuration circuit for FPGA chip

In order to expand the application domain of field programmable gate arrays (FPGA), a highly-integrated wireless configuration scheme is presented by transfering the configuration data with RF method. To fulfill the configuration system, three key hardware portions are necessary, including the configuration controller in FPGA, the RF data channel and the configuration host. In this paper, the central work is focused on the implementation of the RF transceiver, including frequency synthesizer, the receiver and transmitter. Meanwhile, a wake-up mechanism is added to reduce the power consumption. The transceiver is designed with 0.18um RF CMOS process and the fabricated chip is about 12mm². Measurement results are given to testify the design goals.