A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs

We propose a more accurate model for CMOS Hall cross with resistors and JFETs. This model not only completely takes into account the physical effects, such as geometrical effects, temperature effects, parasitical effects, and so on, but also assures the symmetry of the model. And it consists of eight nonlinear resistors, four JFETs, four current-controlled voltage sources, and four reversed-biased diodes modeled by capacitors and constant-current sources. The model has been written in Verilog-A hardware description language and applied in Cadence Spectre simulator successfully. The simulation results of the model are in good agreement with the experimental results.