DocumentCode
2544534
Title
Power minimization of a 433-MHz LC VCO for an implantable neural recording system
Author
Kier, Ryan J. ; Harrison, Reid R.
Author_Institution
Dept. of Electr. & Comput. Eng., Utah Univ., Salt Lake City, UT
fYear
2006
fDate
21-24 May 2006
Abstract
This paper presents a new random-search based integrated inductor optimization algorithm. The algorithm provides the designer with valuable information about design tradeoffs. It is used to design an inductor to minimize power dissipation in an LC VCO. The measured results show that a 53:1 power savings can be achieved over VCOs using inductors optimized only for maximum Q. Six 433-MHz VCOs were fabricated and measured. The VCO using the optimal inductor design has a measured minimum power dissipation of 1.2 mW in a 0.5-mum three-metal CMOS process
Keywords
inductors; low-power electronics; voltage-controlled oscillators; 0.5 micron; 1.2 mW; 433 MHz; LC VCO; inductor design; neural recording system; power minimization; random-search based integrated inductor optimization; three-metal CMOS; Electrical resistance measurement; Immune system; Inductors; Power dissipation; Power generation; Power measurement; Q factor; Q measurement; RLC circuits; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693312
Filename
1693312
Link To Document