Title :
Bisection Based Placement for the X Architecture
Author :
Ono, Satoshi ; Tilak, Sameer ; Madden, Patrick H.
Author_Institution :
Dept. of Comput. Sci., SUNY, Binghamton, NY
Abstract :
Rising interconnect delay and power consumption have motivated the investigation of alternative integrated circuit routing architectures. In particular, the X architecture, which features preferred routing in diagonal directions, has gained a measure of industry support, and has even been validated at 65nm. While there has been extensive study of Manhattan design methods, there are markedly fewer published results for non-Manhattan design. To help fill this gap, we study a patented placement method for the X architecture; to our knowledge, there have been no prior published results for the method. Surprisingly, we find that the patented method in fact performs worse than traditional Manhattan methods - for both Manhattan and X routing metrics. We also present a theoretic formulation which explains why solution quality is degraded. Many groups in industry are evaluating the merits of non-Manhattan routing architectures. By providing concrete experimental results, we hope to improve the accuracy of these evaluations.
Keywords :
integrated circuit interconnections; integrated circuit layout; nanotechnology; network routing; X architecture; bisection based placement; integrated circuit routing architectures; nonManhattan routing architectures; patented placement method; Concrete; Degradation; Delay; Design methodology; Energy consumption; Gain measurement; Integrated circuit interconnections; Integrated circuit measurements; Particle measurements; Routing;
Conference_Titel :
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
1-4244-0629-3
Electronic_ISBN :
1-4244-0630-7
DOI :
10.1109/ASPDAC.2007.357978