ASIC implementation of the cross frequency coupling algorithm for EEG signal processing

Author

Davis, P. ; Creusere, C.D. ; Klipsh, W.T.

Author_Institution

Sch. of Electr. & Comput. Eng., New Mexico State Univ., Cruces, NM, USA

fYear

2014

fDate

10-12 Dec. 2014

Firstpage

248

Lastpage

251

Abstract

In this paper we present an ASIC implementation of the cross frequency coupling (CFC) algorithm that calculates the modulation index directly from digitized electroencephalograph (EEG) signals. To our knowledge this is the first implementation of the CFC algorithm in hardware. The advantage of directly computing the modulation index on chip is that the raw EEG data does not have to be stored in memory and the mobility of the device will allow for more modulation index data to be recorded. The chip is designed on IBM 0.18 micron process. The chip size is 3mm × 3mm with 191mW power consumption.

Keywords

application specific integrated circuits; electroencephalography; medical signal processing; ASIC implementation; CFC; EEG signal processing; application specific integrated circuits; chip size; cross-frequency coupling algorithm; digitized electroencephalograph signals; modulation index; power 191 mW; size 3 mm; Couplings; Electroencephalography; Field programmable gate arrays; Finite impulse response filters; Frequency modulation; Signal processing algorithms; ASIC; Cross Modulation; EEG;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits (ISIC), 2014 14th International Symposium on

Conference_Location

Singapore

Type

conf

DOI

10.1109/ISICIR.2014.7029468

Filename

7029468