DocumentCode
2544805
Title
DFM/DFY practices during physical designs for timing, signal integrity, and power
Author
Chen, Shi-Hao ; Chu, Ke-Cheng ; Lin, Jiing-Yuan ; Tsai, Cheng-Hong
Author_Institution
Global UniChip Corp., Hsinchu
fYear
2007
fDate
23-26 Jan. 2007
Firstpage
232
Lastpage
237
Abstract
We present our experience of DFM (design for manufacturability) and DFY (design for yield) considerations on physical designs at 0.13 mum and below technology nodes. The impact of some DFM approaches on timing and signal integrity are addressed. We also present our experience of yield analysis and improvement for the designs with process variation and dynamic IR drop issues.
Keywords
design for manufacture; integrated circuit design; integrated circuit yield; manufacturing processes; timing; 0.13 micron; DFM; DFY; design for manufacturability; design for yield; dynamic IR drop; physical designs; process variation; signal integrity; timing integrity; yield analysis; Design for manufacture; Design optimization; Lithography; Manufacturing processes; Process design; Prototypes; Routing; Signal design; Timing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
1-4244-0629-3
Electronic_ISBN
1-4244-0630-7
Type
conf
DOI
10.1109/ASPDAC.2007.357991
Filename
4196037
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