DocumentCode :
2544913
Title :
Yield projection from defect monitors: the influence of gross defects [BiCMOS process]
Author :
Harrison, Neil
Author_Institution :
Northern Telecom Electron. Ltd., Nepean, Ont., Canada
fYear :
1995
fDate :
13-15 Nov 1995
Firstpage :
146
Lastpage :
154
Abstract :
Accurate yield projection requires an appreciation of the role of gross or area defects. Yield projection from defect monitors can only be successful if the presence of gross defects is handled correctly. This paper presents a technique for the identification of such defects and quantifies the effect on projected yield of varying the criterion for distinguishing gross defects from a cluster of point defects
Keywords :
BiCMOS integrated circuits; VLSI; integrated circuit yield; production testing; BiCMOS process; VLSI; area defects; defect monitors; gross defects; yield projection; BiCMOS integrated circuits; Capacitors; Condition monitoring; Fabrication; Probes; Product codes; Telecommunications;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1995. Proceedings., 1995 IEEE International Workshop on,
Conference_Location :
Lafayette, LA
ISSN :
1550-5774
Print_ISBN :
0-8186-7107-6
Type :
conf
DOI :
10.1109/DFTVS.1995.476947
Filename :
476947
Link To Document :
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