Future devices for information processing

Current CMOS devices operate at about six orders of magnitude above the k_BTln2 Joules/bit switching limit imposed by physics. Nevertheless, it can be shown that continued scaling of device features that are then densely packed and operated at attainable frequencies will result in the generation of thermal loads that cannot be managed by any known heat removal technology. We discuss possible successor/complementary logic devices that reduce the level of heat generation and we discuss new nonvolatile memory techniques that could radically impact information processing architectures and hence the performance requirements for logic devices.