Abstract :
Notice of Violation of IEEE Publication Principles
"A 12.5GHz SiGe BICMOS Limiting Amplifier Using a Dual Offset Cancellation Loop"
by Maxim, A.; Antrik, D
in the Proceedings of the 31st European Solid-State Circuits Conference (ESSCIRC) Sept. 2005.
After careful and considered review, it has been determined that the above paper is in violation of IEEE\´s Publication Principles.
Specifically, the coauthor\´s name was fabricated by Adrian Maxim and added to the paper. In response to an inquiry on this misconduct, Mr. Maxim acknowledged that the following people who have been listed as co-authors on several of his papers are fabricated names and that he is the only author:
C. Turinici, D. Smith, S. Dupue, M. Gheorge, R. Johns, D. Antrik
Additionally, in papers by Mr. Maxim that have co-authors other than those listed above, it was discovered in some cases that he had not consulted with them while writing the papers, and submitted papers without their knowledge.
Although Mr. Maxim maintains that not all of the data is falsified, IEEE nevertheless cannot assure the integrity of papers posted by him because of his repeated false statements.
Due to the nature of this violation, reasonable effort should be made to remove all past references to the above paper, and to refrain from any future references.
A 12.5GHz limiting amplifier was realized in a 0.2μm 90GHz f/sub T/ SiGe BICMOS process. The signal path was implemented as a cascade of emitter followers and differential stages using multiple capacitive peaking networks. The output offset voltage was reduced to fractions of mV by using a dual active offset cancellation loop having the compensation capacitance integrated on-chip due to a Miller multiplication architecture. ICs specifications include: >60dB signal path gain, <0.2mV output offset voltage, >12.5GHz signal path bandwidth, 1mV input sensitivity, <25ps rise/ fall time, <15ps deterministic jit- er, 1.5×1.5mm/sup 2/ die area and 25mA current from a 3.3V 7±10% supply voltage.
Keywords :
BiCMOS analogue integrated circuits; Ge-Si alloys; limiters; microwave amplifiers; microwave integrated circuits; millimetre wave amplifiers; millimetre wave integrated circuits; semiconductor materials; 0.2 micron; 1 mV; 12.5 GHz; 25 mA; 90 GHz; BICMOS limiting amplifier; Miller multiplication architecture; SiGe; compensation capacitance; dual offset cancellation loop; emitter followers; multiple capacitive peaking networks; signal path; Bandwidth; BiCMOS integrated circuits; Capacitance; Germanium silicon alloys; Jitter; Notice of Violation; Silicon germanium; Solid state circuits; Voltage;
